With the help of the "Rule File Manager" different rule sets can be created and managed.
New:
Create a new rule set with a user defined name.
Save:
Save changes in the currently selected rule set.
Delete:
Delete the currently selected rule set.
Import:
Import a new rule set out of a xml file.
Export:
Export the current rule set to a xml file.
Tolerance:
Tolerance for all check values. All check values will be reduced by e.g. 1% to not show false errors (e.g. when checking for 150µm spacing, a distance of 49.9 µm can be ignored in this way).
Unit Converter:
Small tool to convert numbers between µm and mils.
Compare:
Opens a new window where two rules can be compared in a table view.
Single check rules:
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Minimum spacing between copper areas of same or different nets on outer layers (used if no copper foil rule can be applied) |
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Minimum copper trace width on outer layers (used if no copper foil rule can be applied) |
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Minimum spacing between copper areas and the PCB outline (-1 = deactivated) |
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Minimum angle in copper areas on outer layers |
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If active, all SMD pads with soldermask opening and component pin are reported, if they are located completely inside a copper area (no thermal reliefs) |
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Do not report missing thermal pads, which are located completely under a component body and have a size larger as this value (e.g. cooling pads) |
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Minimum needed solder mask clearance arround SMD pads (.smd Attribute) |
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Minimum needed solder mask clearance arround test point pads (.test_point Attribute) |
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Minimum spacing between copper areas of same or different nets on inner layers (used if no copper foil rule can be applied) |
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Minimum copper trace width on inner layers (used if no copper foil rule can be applied) |
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Minimum spacing between copper areas and the PCB outline (-1 = deactivated) |
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Minimum angle in copper areas on inner layers |
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Minimum distance from the solder mask opening to surrounding copper |
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Minimum spacing between solder mask clearances (=smallest solder resist fillet) |
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Minimum width of solder mask clearances |
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Minimum angle in solder mask clearances |
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Minimum distance to any solder mask opening |
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Minimum distance to any component |
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Check only text primitives (.nomenclature attribute) for a minimum distance to components, or all primitives |
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Minimum spacing between silkscreen printings |
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Minimum size of silkscreen primitives |
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Minimum spacing between silkscreen printings and the PCB outline (-1 = deactivated) |
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Minimum angle in silk screen printing |
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Minimum needed solder mask clearance for plated through holes (.drill=via) |
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Minimum needed solder mask clearance for plated through hole copper pads (.drill=via) |
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If active, mask clearances which are smaller than the VIA-Pad are not reported |
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If active, missing solder mask openings for VIA drills will not be reported |
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If active, missing solder mask openings for VIA drills will not be reported |
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Minimum annular ring for the VIA on outer signal layers |
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Minimum annular ring for the VIA on inner signal layers |
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If active, missing copper pads on inner signal layers will not be reported |
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Minimum distance to surrounding copper on inner layers, if missing pads are accepted |
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Minimum diameter of plated through holes (.drill=via) |
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Minimum Distance to any other Drill |
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Minimum needed solder mask clearance for through hole technology drills (.drill=plated) |
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Minimum needed solder mask clearance for through hole technology copper pads (.drill=plated) |
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Minimum annular ring for the through hole technology drills on outer signal layers (.drill=plated) |
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Minimum annular ring for the through hole technology drills on inner signal layers (.drill=plated) |
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If active, missing copper pads on inner signal layers will not be reported |
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Minimum distance to surrounding copper on inner layers, if missing pads are accepted |
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If active, all THT copper pads are reported, if they are located completely inside a copper area (no thermal reliefs) |
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Minimum diameter of through hole technology drills (.drill=plated) |
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Minimum Distance to any other Drill |
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Minimum needed solder mask clearance for unplated through holes (.drill=non_plated) |
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Minimum distance to surrounding copper on outer signal layers |
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Minimum distance to surrounding copper on inner signal layers |
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Minimum diameter of unplated through holes (.drill=non_plated) |
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Minimum Distance to any other Drill |
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Minimum needed solder mask clearance for laser drills |
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If active, missing solder mask openings for laser drills will not be reported |
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Minimum annular ring for the laser drill on all affected signal layers |
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Minimum diameter of laser drills |
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Minimum Distance to any other Drill |
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Minimum annular ring for the drill on outer signal layers |
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Minimum annular ring for the drill on inner signal layers |
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If active, missing copper pads on inner signal layers will not be reported |
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Minimum distance to surrounding copper on inner layers, if missing pads are accepted |
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Minimum diameter of plated through holes |
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Minimum distance to any other Drill |
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Minimum annular ring for the drill on outer signal layers |
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Minimum annular ring for the drill on inner signal layers |
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If active, missing copper pads on inner signal layers will not be reported |
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Minimum distance to surrounding copper on inner layers, if missing pads are accepted |
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Minimum diameter of plated through holes |
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Minimum distance to any other Drill |
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Maximum Foil thickness for this rule |
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Minimum spacing between copper areas of same or different nets on outer layers with this foil |
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Minimum copper trace width on outer layers with this foil |
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Minimum spacing between copper areas of same or different nets on inner layers with this foil |
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Minimum copper trace width on inner layers with this foil |
The result explanations help you to easily interpret the check results reported by PCB-Investigator`s Design Rule Check.
There is a focus on illustrating the technical background as well as on giving a understanding of the unavoidable tolerances during the PCB manufacturing process.
Small distances in copper, as well as thin copper areas might not be producible due to physical etching restrictions.
A chosen technology e.g. IPC Class II should be applied everywhere on the board, as only a single violation forces the PCB supplier to switch to finer production parameters (e.g. IPC Class I) for the whole board.
The finer the structures, the more expensive the board will be.
Solder resist webs with a width of less than app. 70µm are hardly producible with standard technology.
There is always the risk, that those small pieces will detach and adhere somewhere else, which can lead to solder problems and failures.
Smaller distances and webs might only be producible with an expensive special solder resists and less resist height, which influences the isolation quality.
To avoid unnecessary costs, PCB-Investigator reports all those violations.
CAD data 
With allowed displacement As there will always be a slight displacement between the solder resist and the conductive pattern, surrounding copper should have a minimum distance of the allowed displacement from the solder resist opening. If not, there is the risk that the surrounding copper will also be exposed, which can lead to electric shorts by e.g. solder bridges.
The allowed displacement is app. 75µm, also 50µm is possible, but more expensive.
CAD data 
With allowed displacement The displacement can also have negative impact on the solderability of SMD pads or testability of test points.
To ensure further processability, there should be a solder resist opening with an oversize of the maximum allowed displacement (e.g. 75µm) for all SMD pads and test points.
So, the copper will always be completely solderable/testable.
Each drill should have a solder resist opening, which ensures that the drill is free of solder resist despite the combined displacement of the solder resist and of the drill itself.
A partly covered drill or solder resist in the drill sleeve can detach and adhere somewhere else during the cleaning process. This can lead to solder problems and failures and contaminates the chemical baths of the PCB supplier. It also effects the EMC behavior.
A completely covered drill without any solder resist opening on one side can´t be cleaned and therefore contaminates the chemical baths.
If covered on both sides, the enclosed air in the drill could break the solder resist cover when expanding due to heat. The result is unwanted dirt on the board.
The drill diameter and the drill distance are very important factors for the price calculation.
Very thin drills have a short life period and must often be replaced. They are also less long, which forces the PCB supplier to drill only 1-2 panels at the same time instead of drilling e.g. 5 panels in a package.
Small distances between two drills increase the risk the drill is breaking or the two holes are merging to one undefined shape.
Two holes at the same location can also lead to broken drills or an undefined hole shape.
To achieve a clearly defined connection between layers, the copper pads for the single drills must be large enough, so that a drill displaced within the allowed tolerances is still located completely within the pad.
If not, this can have a strong impact on the EMC behavior and lead to failures due to a loose or broken contact.
Small annular rings and therefore narrow tolerances in the drilling process might still be producible, but force the PCB supplier to use high-end drilling machines and to drill only one Panel at the same time instead of e.g. 5 panels in a package. This has a very strong influence on the PCB costs.
In this case we must differ between plated and un-plated drills.
For plated drills, the distance to surrounding copper is important on inner layers, when the copper pad is omitted. Due to the production tolerances, the displacement of the drill could lead to broken connections or shorts, if surrounding copper is too close.
For unplated drills, the distance is needed for tenting the hole during the plating process to avoid copper in the hole. When the un-plated drill could not be securely tented, a second drill process after the plating process is needed instead. This raises the costs enormously.
Summary
Performing the Design Rule Check (DRC) of PCB-Investigator is the first step to avoid unneeded costs and to increase the reliability of your PCB.
Although in some cases the standard rules must be violated to fulfill some requirements (e.g. Space requirements), there is always a potential to save money and increase the reliability with a few minor layout changes.
In addition to the distance calculation, an area calculation following the risk assessement tool of ZVEI is also supported.
Settings
Important type of test (Calculate Distance):
Examining, it is necessary to distinguish, which areas should be examined together. The two types of simulating shown here differ mainly in the speed of test and their accuracy (number of results found).
1. Choosing "Exposed Copper", the non-lacquered (omitted), conductive copper pads and copper lines are compared directly to each other. This type of simulation takes a bit longer, but produces significantly more precise results (thin white line).
2. Choosing "Solder Mask Opening", it isn´t the direct copper pads or copper lines that are used for comparison, but the so called solder mask openings, i.e. the surfaces not being covered with varnish. However, these are slightly larger than the copper areas they release (thick white line).
Particle:
The length of the assumed contamination can be parameterized here.
Ignore Options:
1. If the contamination is located between elements of the same net, you can select whether the entries should be ignored or not.
2. If you select the option "underneath component", results of possible short circuits being completely under components will be hidden.
3. If the option "same component" is activated, possible short circuits between pins of the same component will be hidden.
4. If nets are connected by contamination and at least one of the nets is a not-used "$NONE$" net, the results can be hidden as well.
5. You can also ignore areas with coating (Top oder Bot side). The coating prevents the occurrence of short circuits. Therefore these areas are not relevant for the analysis. For a quick calculation use layers with surfaces for the covered areas, all copper below the coating surfaces will be ignored for further calculations.
Filter options:
Filter:
If you want to look closer at a certain component or net, you can filter by using the two drop down menus. In this case, the list is filtered to only show the selected net or component (either in the 'from' or the 'to' column).
Example Area Calculation:
All Plugins have the following two Interfaces for direct calls from the outside.
///<summary
/// Analysis interface for scripts and plugins.
///</summary
→ The Header from the first Interface.
public interface IPCBIAnalysis {
///<summary
/// The name of this analysis to identify it with the settings.
///</summary
string Name { get; }
///<summary
/// The readable name of this analysis
///</summary
string Title { get; }
///<summary
/// The path to the results directory of this analysis relative to the job path
///</summary
string ResultsFolderName { get; }
///<summary
/// The preview icon for this analysis
///</summary
Icon PreviewIcon { get; }
///<summary
/// Set if the file preview should show if results are available
///</summary
Set if the file preview should show if results are available
///<summary
/// Create a instance of rules to define the default standard rules.
///</summary
PCBI.Automation.Rules.RulesContainer GetStandardRules();
// void AddToUpdateProgress(PCB_Investigator.PCBIWindows.PCBIWorkingDialog working, int minValue, int maxValue);
// bool Execute(string ResultFilePath);
public interface IPluginAnalysis: IPlugin, IPCBIAnalysis{
///<summary
///
///</summary
///
void AddToUpdateProgress(PCB_Investigator.PCBIWindows.PCBIWorkingDialog working, int minValue, int maxValue);
bool Execute(IAnalysisParams analysisParams);
bool Execute(string resultFilePath); }
→
The script is allowed to increment
values between minValue and maxValue.