Getting started:

1. Click onto the blue question mark to review the preconditions for the Design Rule Check:
• All signal layers must be positive. Negative layers can be inverted in the layer matrix,
• The stack-up definition must be correct (e.g. type and order of layers),
• The Oversize on the solder mask layers must already be generated,
• All soldered copper pads must have the '.smd' attribute,
• All testpoint copper pads must have the '.test_point' attribute,
• All unplated drills must have the attribute '.drill=non_plated',
• All drilled copper pads must have the attribute '.pad_usage=via',
• All lines defining a text should have the attribute '.nomenclature',
• For the Open/Short Check, a netlist must be available in the data set.
2. Select the rule set, which should be applied. PCB-Investigator is delivered with 2 predefined example rule sets.
3. With the Rule File Manager you can create or edit own rule sets.
4. All layers, which can be analyzed, are listed here and can be checked or unchecked.
5. The minimum Space and Trace values must be defined separately for each layer.
6. The 'Used Trace' columns shows the smallest line diameter used on this layer. This might be an indicator for the 'Trace' check value.
7. If this option is active, the net list will be checked at the end for opens or shorts.
8. Click on 'Start' to run the DRC analysis.
9. There is a progress bar for each layer indicating the progress during the analysis.

With the help of the "Rule File Manager" different rule sets can be created and managed.

New:
Create a new rule set with a user defined name.
Save:
Save changes in the currently selected rule set.
Delete:
Delete the currently selected rule set.
Import:
Import a new rule set out of a xml file.
Export:
Export the current rule set to a xml file.
Tolerance:
Tolerance for all check values. All check values will be reduced by e.g. 1% to not show false errors (e.g. when checking for 150µm spacing, a distance of 49.9 µm can be ignored in this way).
Unit Converter:
Small tool to convert numbers between µm and mils.
Compare:
Opens a new window where two rules can be compared in a table view.

Single check rules:

• Outer Signal Rules
  

  Minimum spacing between copper areas of same or different nets on outer layers (used if no copper foil rule can be applied)

  Minimum copper trace width on outer layers (used if no copper foil rule can be applied)

  Minimum spacing between copper areas and the PCB outline (-1 = deactivated)

  Minimum angle in copper areas on outer layers

  If active, all SMD pads with soldermask opening and component pin are reported, if they are located completely inside a copper area (no thermal reliefs)

  Do not report missing thermal pads, which are located completely under a component body and have a size larger as this value (e.g. cooling pads)

  Minimum needed solder mask clearance arround SMD pads (.smd Attribute)

  Minimum needed solder mask clearance arround test point pads (.test_point Attribute)

• Inner Signal Rules
  

  Minimum spacing between copper areas of same or different nets on inner layers (used if no copper foil rule can be applied)

  Minimum copper trace width on inner layers (used if no copper foil rule can be applied)

  Minimum spacing between copper areas and the PCB outline (-1 = deactivated)

  Minimum angle in copper areas on inner layers

• Solder Mask Rules
  

  Minimum distance from the solder mask opening to surrounding copper

  Minimum spacing between solder mask clearances (=smallest solder resist fillet)

  Minimum width of solder mask clearances

  Minimum angle in solder mask clearances

• Silkscreen Rules
  

  Minimum distance to any solder mask opening

  Minimum distance to any component

  Check only text primitives (.nomenclature attribute) for a minimum distance to components, or all primitives

  Minimum spacing between silkscreen printings

  Minimum size of silkscreen primitives

  Minimum spacing between silkscreen printings and the PCB outline (-1 = deactivated)

  Minimum angle in silk screen printing

• VIA Rules
  

  Minimum needed solder mask clearance for plated through holes (.drill=via)

  Minimum needed solder mask clearance for plated through hole copper pads (.drill=via)

  If active, mask clearances which are smaller than the VIA-Pad are not reported

  If active, missing solder mask openings for VIA drills will not be reported

  If active, missing solder mask openings for VIA drills will not be reported

  Minimum annular ring for the VIA on outer signal layers

  Minimum annular ring for the VIA on inner signal layers

  If active, missing copper pads on inner signal layers will not be reported

  Minimum distance to surrounding copper on inner layers, if missing pads are accepted

  Minimum diameter of plated through holes (.drill=via)

  Minimum Distance to any other Drill

• PTH / THT Rules
  

  Minimum needed solder mask clearance for through hole technology drills (.drill=plated)

  Minimum needed solder mask clearance for through hole technology copper pads (.drill=plated)

  Minimum annular ring for the through hole technology drills on outer signal layers (.drill=plated)

  Minimum annular ring for the through hole technology drills on inner signal layers (.drill=plated)

  If active, missing copper pads on inner signal layers will not be reported

  Minimum distance to surrounding copper on inner layers, if missing pads are accepted

  If active, all THT copper pads are reported, if they are located completely inside a copper area (no thermal reliefs)

  Minimum diameter of through hole technology drills (.drill=plated)

  Minimum Distance to any other Drill

• NPTH Rules
  

  Minimum needed solder mask clearance for unplated through holes (.drill=non_plated)

  Minimum distance to surrounding copper on outer signal layers

  Minimum distance to surrounding copper on inner signal layers

  Minimum diameter of unplated through holes (.drill=non_plated)

  Minimum Distance to any other Drill

• MicroVia Rules
  

  Minimum needed solder mask clearance for laser drills

  If active, missing solder mask openings for laser drills will not be reported

  Minimum annular ring for the laser drill on all affected signal layers

  Minimum diameter of laser drills

  Minimum Distance to any other Drill

• Buried Drill Rules
  

  Minimum annular ring for the drill on outer signal layers

  Minimum annular ring for the drill on inner signal layers

  If active, missing copper pads on inner signal layers will not be reported

  Minimum distance to surrounding copper on inner layers, if missing pads are accepted

  Minimum diameter of plated through holes

  Minimum distance to any other Drill

• Buried Drill Rules
  

  Minimum annular ring for the drill on outer signal layers

  Minimum annular ring for the drill on inner signal layers

  If active, missing copper pads on inner signal layers will not be reported

  Minimum distance to surrounding copper on inner layers, if missing pads are accepted

  Minimum diameter of plated through holes

  Minimum distance to any other Drill

• Copper Foil Rules
  

  Maximum Foil thickness for this rule

  Minimum spacing between copper areas of same or different nets on outer layers with this foil

  Minimum copper trace width on outer layers with this foil

  Minimum spacing between copper areas of same or different nets on inner layers with this foil

  Minimum copper trace width on inner layers with this foil

Result Viewer:

1. Load an available DRC results from the list or import an archived result (xml file) from your computer. With the 'Export' button you can archive the loaded result as xml file to any location on your computer.
2. After having loaded one result, you get a list of analyzed layers. Layers are only shown, when they contain any DRC violations. Please check one of the layers to see the error categories.
3. Here you get a list of error categories including the amount of violations on the active layer. Multiple or all error categories can be selected at the same time.
4. This is the list of real violations of selected error categories on this layer. Some violations are grouped together, when they belong e.g. to the same smd geometry or via pad stack. The measured value and the check value are shown in additional columns. Each violation can be marked as 'Critical' by the user. This information is stored back into the result file and can e.g. be used to choose violations, which should be mentioned in the 'Extended Design Report'.
5. These two filters can be applied to the list to reduce the visible violations to critical errors or errors situated only inside the PCB profile area.
6. The 'Auto-Zoom' and 'Activate Layers' options are used, when clicking/selecting one violation from the list. If activated, PCB-Investigator zooms to the region around the selected violation in the main drawing area

The result explanations help you to easily interpret the check results reported by PCB-Investigator`s Design Rule Check.

There is a focus on illustrating the technical background as well as on giving a understanding of the unavoidable tolerances during the PCB manufacturing process.

• Bottlenecks and spacing
  

  Small distances in copper, as well as thin copper areas might not be producible due to physical etching restrictions.

  A chosen technology e.g. IPC Class II should be applied everywhere on the board, as only a single violation forces the PCB supplier to switch to finer production parameters (e.g. IPC Class I) for the whole board.

  The finer the structures, the more expensive the board will be.

• Solder resist webs and spacing
  

  Solder resist webs with a width of less than app. 70µm are hardly producible with standard technology.

  There is always the risk, that those small pieces will detach and adhere somewhere else, which can lead to solder problems and failures.

  Smaller distances and webs might only be producible with an expensive special solder resists and less resist height, which influences the isolation quality.

  To avoid unnecessary costs, PCB-Investigator reports all those violations.

• Coverages and exposures
  CAD data
  With allowed displacement
  

  As there will always be a slight displacement between the solder resist and the conductive pattern, surrounding copper should have a minimum distance of the allowed displacement from the solder resist opening. If not, there is the risk that the surrounding copper will also be exposed, which can lead to electric shorts by e.g. solder bridges.

  The allowed displacement is app. 75µm, also 50µm is possible, but more expensive.

• Soldering and testing
  CAD data
  With allowed displacement
  

  The displacement can also have negative impact on the solderability of SMD pads or testability of test points.

  To ensure further processability, there should be a solder resist opening with an oversize of the maximum allowed displacement (e.g. 75µm) for all SMD pads and test points.

  So, the copper will always be completely solderable/testable.

• Drilling and cleanliness
  

  Each drill should have a solder resist opening, which ensures that the drill is free of solder resist despite the combined displacement of the solder resist and of the drill itself.

  A partly covered drill or solder resist in the drill sleeve can detach and adhere somewhere else during the cleaning process. This can lead to solder problems and failures and contaminates the chemical baths of the PCB supplier. It also effects the EMC behavior.

  

  A completely covered drill without any solder resist opening on one side can´t be cleaned and therefore contaminates the chemical baths.

  If covered on both sides, the enclosed air in the drill could break the solder resist cover when expanding due to heat. The result is unwanted dirt on the board.

• Drill size and distance
  

  The drill diameter and the drill distance are very important factors for the price calculation.

  Very thin drills have a short life period and must often be replaced. They are also less long, which forces the PCB supplier to drill only 1-2 panels at the same time instead of drilling e.g. 5 panels in a package.

  Small distances between two drills increase the risk the drill is breaking or the two holes are merging to one undefined shape.

  Two holes at the same location can also lead to broken drills or an undefined hole shape.

• Copper connection
  

  To achieve a clearly defined connection between layers, the copper pads for the single drills must be large enough, so that a drill displaced within the allowed tolerances is still located completely within the pad.

  If not, this can have a strong impact on the EMC behavior and lead to failures due to a loose or broken contact.

  Small annular rings and therefore narrow tolerances in the drilling process might still be producible, but force the PCB supplier to use high-end drilling machines and to drill only one Panel at the same time instead of e.g. 5 panels in a package. This has a very strong influence on the PCB costs.

• Distance to surrounding copper
  

  In this case we must differ between plated and un-plated drills.

  For plated drills, the distance to surrounding copper is important on inner layers, when the copper pad is omitted. Due to the production tolerances, the displacement of the drill could lead to broken connections or shorts, if surrounding copper is too close.

  

  For unplated drills, the distance is needed for tenting the hole during the plating process to avoid copper in the hole. When the un-plated drill could not be securely tented, a second drill process after the plating process is needed instead. This raises the costs enormously.

•  Missing Thermal Pads

Summary

Performing the Design Rule Check (DRC) of PCB-Investigator is the first step to avoid unneeded costs and to increase the reliability of your PCB.

Although in some cases the standard rules must be violated to fulfill some requirements (e.g. Space requirements), there is always a potential to save money and increase the reliability with a few minor layout changes.